------------------------------------------------------------------------------- -- Title : Multioperand Addition -- Design : AVG -- Author : Ambarish Vyas -- Company : George Mason University ------------------------------------------------------------------------------- LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.NUMERIC_STD.ALL; ENTITY madd IS PORT( x, y, z : IN STD_LOGIC_VECTOR(3 DOWNTO 0); w : IN STD_LOGIC_VECTOR(7 DOWNTO 0); s : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) ); END madd; ARCHITECTURE structural OF madd IS SIGNAL level1_sum : STD_LOGIC_VECTOR(3 DOWNTO 0); SIGNAL level1_cout: STD_LOGIC_VECTOR(4 DOWNTO 0); SIGNAL level2_cout: STD_LOGIC_VECTOR(5 DOWNTO 0); SIGNAL level2_sum : STD_LOGIC_VECTOR(5 DOWNTO 0); SIGNAL level3_cout: STD_LOGIC_VECTOR(8 DOWNTO 1); BEGIN ------------------------------------------------------ -- For Generate for the 4 Full Adders at level 1 ------------------------------------------------------ gen_fa1: FOR i IN 0 TO 3 GENERATE fa1: ENTITY work.full_adder(dataflow) PORT MAP ( x=>x(i), y=> y(i), z=> z(i), cout=> level1_cout(i+1), sum=>level1_sum(i) ); END GENERATE gen_fa1; ------------------------------------------------------ -- For Generate for the 3 Full Adders at level 2 ------------------------------------------------------ gen_fa2: FOR i IN 1 TO 3 GENERATE fa2: ENTITY work.full_adder(dataflow) PORT MAP ( x=>level1_sum(i), y=> level1_cout(i), z=> w(i), cout=> level2_cout(i+1), sum=>level2_sum(i) ); END GENERATE gen_fa2; ------------------------------------------------------ -- For Generate for the 4 Full Adders at level 3 ------------------------------------------------------ level2_sum(5)<= w(5); gen_fa3 : FOR i IN 2 TO 5 GENERATE fa3: ENTITY work.full_adder(dataflow) PORT MAP ( x=>level2_sum(i), y=> level2_cout(i), z=> level3_cout(i), cout=> level3_cout(i+1), sum=>s(i) ); END GENERATE gen_fa3; -------------------------------------- -- Half Adders at level 2 and level 3 --------------------------------------- ha1: ENTITY work.half_adder(dataflow) PORT MAP ( x=>w(0), y=> level1_sum(0), cout=> level2_cout(1), sum=>s(0) ); ha2: ENTITY work.half_adder(dataflow) PORT MAP ( x=>w(4), y=> level1_cout(4), cout=> level2_cout(5), sum=>level2_sum(4) ); ha3: ENTITY work.half_adder(dataflow) PORT MAP ( x=>level2_sum(1), y=> level2_cout(1), cout=> level3_cout(2), sum=>s(1) ); ha4: ENTITY work.half_adder(dataflow) PORT MAP ( x=>w(6), y=> level3_cout(6), cout=> level3_cout(7), sum=>s(6) ); ha5: ENTITY work.half_adder(dataflow) PORT MAP ( x=>w(7), y=> level3_cout(7), cout=> level3_cout(8), sum=>s(7) ); END structural;